| PART |
Description |
Maker |
| GS8342T08GE-167I GS8342T08GE-200 GS8342T08GE-333I |
36Mb SigmaCIO DDR-II Burst of 2 SRAM
|
GSI[GSI Technology]
|
| GS8662T08E-300I GS8662T08E-167 GS8662T08GE-167 GS8 |
72Mb SigmaCIO DDR-II Burst of 2 SRAM
|
GSI[GSI Technology]
|
| GS8342S08E-167 GS8342S08GE-167 GS8342S08GE-167I GS |
36Mb Burst of 2 DDR SigmaSIO-II SRAM
|
GSI[GSI Technology]
|
| IS61DDPB42M18A IS61DDPB42M18A/A1/A2 IS61DDPB41M36A |
2Mx18, 1Mx36 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
|
Integrated Silicon Solution, Inc
|
| GS8342S36GE-250I GS8342S09E-200I GS8342S09GE-200I |
36Mb Burst of 2 DDR SigmaSIO-II SRAM 1M X 36 STANDARD SRAM, 0.45 ns, PBGA165
36Mb Burst of 2 DDR SigmaSIO-II SRAM 4M X 9 STANDARD SRAM, 0.45 ns, PBGA165
36Mb Burst of 2 DDR SigmaSIO-II SRAM 4M X 9 STANDARD SRAM, 0.5 ns, PBGA165
36Mb Burst of 2 DDR SigmaSIO-II SRAM 4M X 8 STANDARD SRAM, 0.45 ns, PBGA165
36Mb Burst of 2 DDR SigmaSIO-II SRAM 4M X 8 STANDARD SRAM, 0.5 ns, PBGA165
36Mb Burst of 2 DDR SigmaSIO-II SRAM 2M X 18 STANDARD SRAM, 0.45 ns, PBGA165
|
GSI Technology, Inc.
|
| MT54W4MH8B MT54W4MH8B-5 MT54W4MH8BF-4 MT54W2MH18B- |
36Mb QDR?┥I SRAM 2-WORD BURST
36Mb QDR⑩II SRAM 2-WORD BURST
|
MICRON[Micron Technology]
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| GS8322V72 GS8322V18 |
36Mb Burst SRAMs
|
GSI Technology
|
| GS8321V18E-166 GS8321V36GE-250 GS8321V36GE-250I GS |
2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
|
GSI[GSI Technology]
|
| GS8321E18E-166V GS8321E18E-133IV GS8321E18E-133V G |
2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
|
GSI[GSI Technology]
|
| GS8320EV18GT-225 GS8320EV18GT-133 GS8320EV18GT-133 |
2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
|
GSI[GSI Technology]
|
| CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570K |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
